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Patent Searching and Data


Title:
MULTI-STAGE AMPLIFIER CIRCUIT
Document Type and Number:
Japanese Patent JPH04326610
Kind Code:
A
Abstract:

PURPOSE: To realize a MIC amplifier circuit with a small noise figure and a large 1dB compression output voltage and an IM3 intercept point and a high gain by means of a comparatively simple process.

CONSTITUTION: A fist stage amplifier or plural amplifiers having the 1st and succeeding stage amplifiers except the final stage amplifier are formed by using FETs 11, 12 having a gate of self-alignment structure. Then as FETs 13, 14, FETs in which a gate electrode 8 is formed so that an end of a source is overlapped on a source high impurity concentration region via an insulation film on an operating layer 2 inserted between the source and a drain high impurity concentration region 4 and the drain end does not reach the said drain high impurity concentration region 4.


Inventors:
SHIGA NOBUO
Application Number:
JP9687291A
Publication Date:
November 16, 1992
Filing Date:
April 26, 1991
Export Citation:
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Assignee:
SUMITOMO ELECTRIC INDUSTRIES
International Classes:
H03F3/195; H03F3/60; (IPC1-7): H03F3/195; H03F3/60
Attorney, Agent or Firm:
Yoshiki Hasegawa (3 outside)