To provide a multilayer board where a bypass capacitor is provided to a surface board to fully exhibit the function of the bypass capacitor.

A pair of lands 6 and 8 corresponding to a pair of terminals of the bypass capacitor 4 are provided on the surface of the surface board. A power source side current path A and a power source side land 6 corresponding to a power source side terminal of the bypass capacitor are connected with a pair of through holes 7a and 7b so that the power source side current path A runs through the power side land 6. Meanwhile, a ground side current path B and a ground side land 8 corresponding to a ground side terminal of the bypass capacitor are connected with a pair of through holes 7c and 7d so that the ground side current path B runs through the power source side land 8.