Title:
積層型電子部品
Document Type and Number:
Japanese Patent JP7176494
Kind Code:
B2
Abstract:
A multilayer electronic component that includes a stacked body having therein a plurality of dielectric layers including a CZ-based perovskite phase and an element M2, a plurality of internal electrode layers including Ni, and an interface layer including the element M2 in at least a portion of an interface with the plurality of internal electrode layers. Element M2 is an element that has a binding energy between the CZ-based perovskite phase and Ni via the element M2 of less than or equal to −12.3 eV by first-principles calculation using a pseudopotential method. When amounts of elements included in the dielectric layers are expressed as parts by mol, a ratio m2 of an amount of the element M2 to an amount of the Zr in the interface layer is 0.03≤m2≤0.25.
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Inventors:
Tatsuya Izumi
Tomotaka Hirata
Tomotaka Hirata
Application Number:
JP2019155182A
Publication Date:
November 22, 2022
Filing Date:
August 28, 2019
Export Citation:
Assignee:
MURATA MANUFACTURING CO.,LTD.
International Classes:
H01G4/12; H01G4/30
Domestic Patent References:
| JP2019114583A | ||||
| JP2014036140A | ||||
| JP2019036708A | ||||
| JP2014011170A | ||||
| JP2019153778A |
Foreign References:
| WO2006082833A1 | ||||
| WO2012046554A1 |
Attorney, Agent or Firm:
Patent Attorney Fukami Patent Office
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