Title:
精密に制御された容量性エリアを有するコンデンサを備える多層電子デバイス
Document Type and Number:
Japanese Patent JP7355827
Kind Code:
B2
Abstract:
A multilayer electronic device may include a plurality of dielectric layers stacked in a Z-direction that is perpendicular to an X-Y plane. The device may include a first conductive layer overlying one of the plurality of dielectric layers. The multilayer electronic device may include a second conductive layer overlying another of the plurality of dielectric layers and spaced apart from the first conductive layer in the Z-direction. The second conductive layer may overlap the first conductive layer in the X-Y plane at an overlapping area to form a capacitor. The first conductive layer may have a pair of parallel edges at a boundary of the overlapping area and an offset edge within the overlapping area that is parallel with the pair of parallel edges. An offset distance between the offset edge and at least one of the pair of parallel edges may be less than about 500 microns.
Inventors:
Choi, Kwan
Bellorini, Marianne
Bellorini, Marianne
Application Number:
JP2021535613A
Publication Date:
October 03, 2023
Filing Date:
December 19, 2019
Export Citation:
Assignee:
Kyocera Abuex Components Corporation
International Classes:
H01G4/33; H01G4/38; H01G13/00; H01P1/203; H03H7/01
Domestic Patent References:
| JP55169843U | ||||
| JP58028821A |
Attorney, Agent or Firm:
Osamu Yamamoto
Toru Miyamae
Junichi Matsuo
Ayako Omaki
Toru Miyamae
Junichi Matsuo
Ayako Omaki