To provide a multilayer interconnection board that can be laminated without sacrificing the characteristics of at least two different insulating layers even if a conductor wiring layer containing a low-resistance metal is formed while achieving fine wiring by inhibiting shrinkage in the direction of the inside of the lamination surface of the insulating layer.
A first insulating layer 2 made of a first glass ceramic composition, and a second insulating layer 3 made of a second inorganic composition that differs from the first insulating layer 2, are laminated, a conductor wiring layer is formed on or in the laminate, ZnO is contained in the first glass ceramic composition and/or the second inorganic composition, and a package (multilayer interconnection board) 1 for accommodating semiconductor devices that is larger than the content of ZnO at the interface between the first and second insulating layers 2 and 3 and larger than the content of ZnO in the first glass ceramic composition and/or the second inorganic composition is created.
JPH07249869A | 1995-09-26 | |||
JPH08236936A | 1996-09-13 | |||
JP2000036665A | 2000-02-02 | |||
JP2000188017A | 2000-07-04 | |||
JP2000025157A | 2000-01-25 | |||
JPH11224984A | 1999-08-17 |
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