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Title:
MULTILAYERED WIRING BOARD WITH BUILT-IN MULTILAYERED ELECTRONIC COMPONENT, AND MULTILAYERED ELECTRONIC COMPONENT
Document Type and Number:
Japanese Patent JP2006216709
Kind Code:
A
Abstract:

To provide a multilayered wiring board with a built-in multilayered electronic component having a high performance and a high reliability, and also to provide the multilayered electronic component.

The multilayered wiring board 10 incorporates the multilayered electronic component 13. The multilayered electronic component 13 comprises an element assembly consisting of a laminate 13B made by stacking a plurality of dielectric layers 13A, internal electrodes 13C existing between the dielectric layers 13A, and an external terminal electrode 13D formed on the connection surface of the element assembly so as to be connected to the inner electrodes 13C. The inner electrodes 13C are so formed as to substantially have no margin with the non-connection surface. The multilayered wiring board 10 comprises an element assembly consisting of a laminate 11 made by stacking a plurality of dielectric layers 11A, and predetermined wiring patterns 12 existing between the dielectric layers 11A. The non-connection surface of the multilayered electronic component 13 faces the dielectric layers 11A of the multilayered wiring board 10.


Inventors:
CHIKAGAWA OSAMU
SAKAI NORIO
Application Number:
JP2005026867A
Publication Date:
August 17, 2006
Filing Date:
February 02, 2005
Export Citation:
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Assignee:
MURATA MANUFACTURING CO
International Classes:
H05K3/46; H01G2/06
Domestic Patent References:
JP2001060767A2001-03-06
JPH0230570B21990-07-06
JPH11340089A1999-12-10
JP2003046215A2003-02-14
JPS6155376U1986-04-14
JP2001156454A2001-06-08
JP2001111234A2001-04-20
JP2002246503A2002-08-30
JP2003332741A2003-11-21
Attorney, Agent or Firm:
Hajime Ohara