MULTIPLEX CONTROLLER AND METHOD FOR RESTORING IT FROM FAULTY STATE

Title:

MULTIPLEX CONTROLLER AND METHOD FOR RESTORING IT FROM FAULTY STATE

Document Type and Number:

Japanese Patent JP3390824

Kind Code:

B2

Abstract:

PROBLEM TO BE SOLVED: To enable an equipment controller to return a faulty system to a normal state without stopping equipment even when the controller performs processing in a short computing period, by transferring a plurality of blocks to the faulty system from a normal system over a plurality of computing periods in the order of dependence from the highest order.
SOLUTION: When an arithmetic module 131 detects a fault in a computing period (k+1), the module 131 resets a CPU 32O and starts initralization of the control constants of registers in a RAM 316, a memory 412, and a control circuit and initialization of the other elements and the control circuit 414. During the initialization, the module 131 first checks its own hardware for faults in accordance with its own diagnostic program and whether or not a similar fault is detected during a fixed period of time in the past. When a hardware fault is detected or when it is discriminated that an unfixable fault is detected, the module 131 stops the initialization by discriminating that the fault is unfixable. When the cause of the fault is not able to be found, the initialization of such hardware as the register, etc., is started.

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Inventors:

Kotaro Shimamura
Yuichiro Morita
Yoshitaka Takahashi
Takashi Hotta
Hiroyasu Sato
Shigeta Ueda
Akira Bando
Hirokazu Suzuki
Koji Sakamoto

Application Number:

JP6673197A

Publication Date:

March 31, 2003

Filing Date:

March 19, 1997

Export Citation:

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Assignee:

株式会社日立製作所
東京電力株式会社

International Classes:

G05B9/03; G06F11/18; H02M7/48; (IPC1-7): H02M7/48

Domestic Patent References:

JP893679A
JP731160A

Attorney, Agent or Firm:

Tatsuyuki Unuma

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