Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MULTIPLEX CONVERTER
Document Type and Number:
Japanese Patent JP2000078102
Kind Code:
A
Abstract:

To avoid a data error resulting from mis-mount of an interface board on the multiplex converter.

The multiplex converter is provided with a plurality of slots 11 that selectively mount m-sets of 1st interface boards containing n-channels or one 2nd interface board containing n×m channels, a multiplexer/ demultiplexer 13 that applies time division multiplex/demultiplexer processing to a signal from each interface board, a 1st data bus line 14 that is used for bus connection between all the slots 11 and the multiplexer/demultiplexer 13, a 2nd data bus line 21 that is used for bus connection between the slots 11a designated to mount the 2nd interface board and the multiplexer/demultiplexer 13, a mounted board discrimination means 22 that detects the kind of the board mounted on the slots 11a, and a transmission control section 23 that controls a bus line used for transmission of signal data from the selected interface board in response to a result of discrimination by the mounted board discrimination means 22 and controls a read timing of the data.


Inventors:
ANZAI TAKANORI
Application Number:
JP24553898A
Publication Date:
March 14, 2000
Filing Date:
August 31, 1998
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
TOYO COMMUNICATION EQUIP
International Classes:
H04J3/00; H04J3/14; (IPC1-7): H04J3/14; H04J3/00
Attorney, Agent or Firm:
Endo Kyo