PURPOSE: To quicken a response speed, by transmitting a sample value of an analog signal through the use of a plurality of insulating tranformers one by one sequentially.
CONSTITUTION: Four analog signals are outputted from a D/A converter 1 in the order of V1, V2, V3 and V4, and the voltages V1, V2 are inputted to an insulating transformer 61 and the V3, V4 are inputted to an insulating transformer 62 respectively with choppers 51, 52 which are alternately turn on. Pulse response waveforms c1, c2 appears at the secondary side of the insulating tranformers 61, 62. When te pulse response waveform is in settling sufficiently, a sampling pulse is applied to a sample hold circuit to be outputted at the time. For example, the voltage to be outputted at an output terminal 41 is sampled at a sample holding circuit 71 and for the period until the next sampling pulse is applied, the voltage value is held. This is the same for voltages V2∼V4 to be outputted to output terminals 42∼44.
NAKAO YOSHIHIRO
JPS4726234A | ||||
JPS4516428Y1 | 1970-07-08 |
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