PURPOSE: To improve the operating ratio of a multiprocessor system by providing an address coincidence detecting means and an address change detecting means and preferentially processing the access from the access port which first designates and address.

CONSTITUTION: An A port address change detecting circuit 22 of an address contention arbitrating circuit detects the change of the address signal inputted from an A port block. A, B port address change detecting circuit 23 detects the change of the address signal inputted from a B port block, and an A and B port address coincidence detecting circuit 21 detects the coincidence between A and B port addresses. In the case of simultaneous access from A and B port blocks, a preferential port discriminating circuit 24 gives a signal in the low level to the latter access and gives a signal in the high level to the first access. Even in case of just simultaneity, the circuit 24 outputs the signal which indicates pending/approval of access. Thus, the read/write operation from each access port is correctly performed.