Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
MUSE DECODER WITH BUILT-IN NTSC SIGNAL OUTPUT CIRCUIT
Document Type and Number:
Japanese Patent JPH04986
Kind Code:
A
Abstract:

PURPOSE: To perform video reproduction with a receiver for hi-vision simultaneously with an on-going receiver for NTSC by outputting by a MUSE signal by converting to a hi-vision signal and an NTSC signal.

CONSTITUTION: R, G, and B signals outputted from a gamma correction circuit 6a are supplied to vertical directional filters 109, 110, and 111, and are band- limited in a vertical direction, and are converted to non-interlace signals 118, 119, and 120 of 1125 scanning lines. Thence, the non-interlace signals are supplied to time base conversion circuits 10a, 10b, and 10c comprised of memory circuits in which input/output are operated asynchronously, and interlace R, G, and B signals 121, 122, and 123 of 525 scanning lines can be obtained by reading out the required number of lines at the time base conversion circuits 10a, 10b, and 10c.


Inventors:
KASEZAWA TADASHI
ITO HIROSHI
SETO HITOSHI
Application Number:
JP10272190A
Publication Date:
January 06, 1992
Filing Date:
April 18, 1990
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H04N7/015; H04N7/00; H04N7/01; (IPC1-7): H04N7/01; H04N7/00
Domestic Patent References:
JPH033493A1991-01-09
JPH0346479A1991-02-27
Attorney, Agent or Firm:
Kenichi Hayase



 
Next Patent: JPH04987