Title:
NAND型フラッシュメモリのページバッファ
Document Type and Number:
Japanese Patent JP4429007
Kind Code:
B2
Abstract:
A page buffer for an NAND flash memory, including: a first latch for loading data; a second latch for storing data stored on a cell depending on a bit line selection signal; a setting circuit for setting the first latch to a high level to load data in a high level; a first switching circuit for transferring the data stored on the second latch depending on a data output signal of a page buffer; a discharging circuit for discharging charges on a data line; a second switching circuit for connecting the data line discharged by the discharging circuit to the first latch depending on a data control signal to load the data in a low level to the first latch; and a data transferring circuit for transferring the data of the first latch to the second latch.
Inventors:
Money bureau
Application Number:
JP2003424610A
Publication Date:
March 10, 2010
Filing Date:
December 22, 2003
Export Citation:
Assignee:
HYNIX SEMICONDUCTOR INC.
International Classes:
G11C16/02; G11C16/06; G11C7/10; G11C16/04; G11C16/24
Domestic Patent References:
| JP2003233995A | ||||
| JP2002288987A |
Attorney, Agent or Firm:
Teruichi Hase
Maki Kamiya
Maki Kamiya