Title:
【発明の名称】半導体装置の製造方法
Document Type and Number:
Japanese Patent JP3015752
Kind Code:
B2
Abstract:
A semiconductor device including an insulation film superior in both planarization and water resistance is obtained. In this semiconductor device, a first insulation film including impurities is formed on a conductive layer. A film is formed between the first insulation film and the conductive layer for substantially preventing impurities from entering the conductive layer. Water resistance of the first insulation film is improved since impurities are included in the first insulation film. By using an insulation film superior in planarization as the first insulation film, a first insulation film superior in both planarization and water resistance can be obtained. The film provided between the first insulation film and the conductive layer prevents the impurities of the first insulation film from entering the conductive layer. Therefore, reduction in the reliability of the conductive layer can be prevented.
Inventors:
Yasunori Inoue
Hideki Mizuhara
Hideki Mizuhara
Application Number:
JP1278897A
Publication Date:
March 06, 2000
Filing Date:
January 27, 1997
Export Citation:
Assignee:
Sanyo Electric Co., Ltd.
International Classes:
H01L21/265; H01L21/3105; H01L21/316; H01L21/768; H01L23/00; H01L23/522; H01L23/532; (IPC1-7): H01L21/768; H01L21/265; H01L21/316
Domestic Patent References:
| JP226055A | ||||
| JP4234149A | ||||
| JP4317358A | ||||
| JP8241891A |
Other References:
【文献】米国特許5429990(US,A)
Attorney, Agent or Firm:
Koji Yasutomi (1 person outside)