Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
DISTORTION COMPENSATING CIRCUIT
Document Type and Number:
Japanese Patent JPH077333
Kind Code:
A
Abstract:

PURPOSE: To perform effective distortion compensation over wide frequency bands by reducing difference between both the routes of a distorted signal and a main signal and eliminating a delay line by providing a distortion generator and a variable attenuator at the distorted signal route and providing a variable phase-shifter at the main signal route.

CONSTITUTION: When a signal branched at a brancher 12 is inputted to the gate of an FET 22, the non-linearity of a current change between a drain and a source is made strong in comparison with the change of potential difference between a gate and a source, and a current value is reduced. Therefore, an output signal equipped with a small main signal amplification factor and a sufficiently large distortion component can be provided, and a distortion generator 21 can generate the distortion component which is miniaturized, enlarges the distortion generation amount and widens the frequency band. Further, a variable attenuator 41 is arranged on the rear stage of the distortion generator 21 and a variable phase shifter 31 is arranged on the side of a main signal route 13. Thus, the route difference between both routes 13 and 14 is decreased together with the miniaturization of the distortion generator 21. Therefore, the change of a phase difference amount to different frequencies caused by the route difference is reduced, the control of a transmission line is unnecessitated, and distortion compensation is enabled over the wide frequency bands.


Inventors:
KANDA ATSUSHI
IMAI NOBUAKI
NAKAMAE MASARU
Application Number:
JP16845493A
Publication Date:
January 10, 1995
Filing Date:
June 15, 1993
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03F1/32; (IPC1-7): H03F1/32
Attorney, Agent or Firm:
Nagao Tsuneaki