PURPOSE: To sufficiently exhibit the performance of a system by making the acquisition ratio of a common bus constant for each processor in a multi- processor system.

CONSTITUTION: A data input bus 1 is assigned by time division by data input bus use permitting signals 41-4n outputted from a time division bus assigning circuit 4 for a data input bus for respective micro-processors 31-3n. A data output bus 2 is assigned by time division by data output bus use permitting signals 51-5n outputted from a time division bus assigning circuit 5 for a data input bus for respective micro-processors 31-3n.