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Patent Searching and Data


Title:
LOGICAL SIMULATION DEVICE
Document Type and Number:
Japanese Patent JPH0635863
Kind Code:
A
Abstract:

PURPOSE: To provide a logical simulation device which simulates a logic circuit only, distributes surely the data on the inter-processor connector to each of processors forming the simulation device when the data on the circuit module serving as a simulation model of the logic circuit are distributed to these processors, and also generates the simulation model at a high speed.

CONSTITUTION: A logical simulation device includes plural processors 1 to simulate a logic circuit. Each processor 1 is provided with an assignment inhibiting area 3 included in a storage means 2 in a size proportional to the number of input/output terminals of a circuit module stored in the means 2 for assignment of the data on the inter-processor connector. Then, the element data on the circuit module are assigned to the areas except the area 3.


Inventors:
SHOJI MINORU
HIROSE FUMIYASU
Application Number:
JP19067892A
Publication Date:
February 10, 1994
Filing Date:
July 17, 1992
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F11/25; G06F11/26; G06F15/16; G06F17/50; (IPC1-7): G06F15/16; G06F11/26
Attorney, Agent or Firm:
Tsuchihashi Aoi