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Title:
DEVICE AND METHOD FOR CONTROLLING NONVOLATILE SEMICONDUCTOR MEMORY
Document Type and Number:
Japanese Patent JPH0637331
Kind Code:
A
Abstract:

PURPOSE: To make a nonvolatile semiconductor memory mountable on a semiconductor device corresponding to multi-purpose and the like, the same semiconductor device as a light-sensing element in particular, by using a method and a device for control which enable electric erasure of this nonvolatile semiconductor memory of which a manufacturing process is the same as a CMOS process and which can be manufactured with an excellent yield and has a similar construction to the one of an ultraviolet erasure system.

CONSTITUTION: At the time of erasure of a nonvolatile semiconductor memory (EPROM) 15, voltages of a drain layer 3 and a source layer 2 are controlled by a reference voltage control circuit 24 and a drain voltage control circuit 22 and thereby channel hot electrons are generated. Holes made into impact ions thereby are captured by controlling a voltage of a floating gate electrode 5 by a gate control circuit 23 through a control gate electrode 7. Erasure of data is executed by recovering the voltage of the floating gate electrode 5 by injection of these holes.


Inventors:
ENOMOTO YOSHINARI
Application Number:
JP24945192A
Publication Date:
February 10, 1994
Filing Date:
September 18, 1992
Export Citation:
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Assignee:
FUJI ELECTRIC CO LTD
International Classes:
H01L21/8247; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L29/788; H01L29/792; H01L27/115
Attorney, Agent or Firm:
Minoru Yamada