PURPOSE: To easily work the title device and to lower the cost by a method wherein element isolation regions which are provided respectively with definite widths are formed selectively around an active region formed on the surface of a semiconductor substrate and around a stopper diffused region.

CONSTITUTION: A MOS transistor which is composed of gate electrodes 1 and active field regions 2 is formed inside a well region 5 which is former on the surface of a semiconductor substrate, which is a P-type or N-type diffused region having a concentration higher than that of the substrate and in which various kinds of elements are formed; a stopper region 3 which is used to take the potential of the well is formed. Element isolation regions 4 having a definite width L1 are formed around the active field regions 2 and the stopper region 3. The width L1 is set at a size which is a minimum element isolation width or higher and 10μm, or lower. When the element isolation regions 4 are formed in the definite depth, a groove region whose width is wide is eliminated, a process to form a dummy oxide film is not required and the title device can be worked easily.