PURPOSE: To correct a D/A converter with the offset of both positive and negative polarities by the minimum constitution of a logic circuit 2 and the D/A converter 3 without manual aid and dispensing with the D/A converter for adjustment use.
CONSTITUTION: The logic circuit 2 is constituted of a set value register 2A, a correction value register 2B and an adder 2C and the digital code of a CPU 1 is inputted. The output of the logic circuit 2 is inputted to the D/A converter 3. When the value which is the complement of '2' of the offset value of the D/A converter 3 is inputted by the digital code from the CPU 1 to the correction value register 2B of the logic circuit 2 and the digital code is inputted from the CPU 1 to the set value register 2A, the digital code of the correction value register 2B and the digital code are added by the adder 2C to be inputted to the D/A converter 3 and offset errors are added/subtracted to/from the set value by the logic circuit.
JP2014086830 | A/D CONVERTER |
JPH04207228 | SEMICONDUCTOR INTEGRATED CIRUCIT |
JPH0746873 | [Title of Invention] Sampling clock generation circuit for A / D conversion |