PURPOSE: To attain a multiprocessor system having the high program execution efficiency in regard of the interruption processing by reducing the overhead of a processor required for searching processor that performs the interruption processing.
CONSTITUTION: In a multiprocessor system where plural processor modules 1-n are connected together with a bus B, each of these modules is provided with a flag register 1b which holds the interruption permission-/inhibition state in the processor module, an interruption handler 1c which decides whether an external interruption request should be sent to its own processor or the next processor module, an interruption requester 1d which sends the interruption request decided by the handler 1c to the next processor module. Then the interruption request line of an interruption control bus is formed in a daisy chain.
JPS6421561 | PROCESSOR CONTROLLER |
JPS60153344 | [Title of the device] Interruption factor batch-processing device |
JPS6448160 | SERIAL INTERFACE CONTROL SYSTEM |
AIHARA HIDETOSHI