PURPOSE: To reduce the memory capacity of the squaring circuit which performs squaring arithmetic operation at a high speed.

CONSTITUTION: A ROM 31 receive data of the high-order 7. bits of 8-bit input data. Di and selects and outputs the squaring result of data of its high-order 7 bits among the squaring arithmetic results of previously stored 7-bit data. A selector 32 selects and outputs zero or the data of the high-order 7-bit data of the input data Di according to the LSB(least significant bit) of the input data Di. An adder 33 adds the outputs of the selector 32 and ROM 31. An output means 34 outputs data by setting the value of its least significant digit bit according to the LSB of the input data Di, setting zero to the low-order 2nd bit, and using the 14-bit output of the adder 33 as the low-order 3rd and succeeding bits.