Title:
DEVICE FOR EVALUATING LINE CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPH0580816
Kind Code:
A
Abstract:
PURPOSE:To confirm the propriety of a circuit design by means of an offline by detecting a device which is changed to specifications based on a specified format by means of a comparing means. CONSTITUTION:A ladder circuit designed in accordance with a time chart being the basic specifications is stored in a memory 8 and the memory 2 of a computer 10 with a simulation sequencer CPU at first. The computer 10 reads the specifications by inputting the specified format, the program of the ladder circuit, the input of the device, etc., which are generated based on the basic specifications to store them in the memory 2. Input condition is outputted to the sequencer by the formal calculation of the read specified format with an interface 5 in accordance with operation order to be set. Thus, the simulation sequencer is executed so that the output state of the device changed as the result is read from the memory 8. It is compared and decided whether the change matches the specifications or not and the propriety of circuit design is judged.
Inventors:
ARAKAWA TOMOHIRO
Application Number:
JP26897991A
Publication Date:
April 02, 1993
Filing Date:
September 19, 1991
Export Citation:
Assignee:
TOYOTA AUTO BODY CO LTD
International Classes:
G05B19/05; G05B19/048; (IPC1-7): G05B19/05
Domestic Patent References:
| JPS643748A | 1989-01-09 | |||
| JPS6065305A | 1985-04-15 |
Attorney, Agent or Firm:
High Katsuhiko Hashi
Next Patent: JPH0580817