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Title:
BUFFER STORAGE CONTROL SYSTEM
Document Type and Number:
Japanese Patent JPH064403
Kind Code:
A
Abstract:

PURPOSE: To provide the buffer storage control system whose fetch access performance to a buffer storage device is improved.

CONSTITUTION: At the time of fetch access to a buffer storage device 3, in the case a buffer mishit is detected, a bypass fetch is executed unconditionally to a request origin 4 from one set of move-in register 2 selected arbitrarily, and data is sent out to the request origin 4. Thereafter, the move-in register for holding data of an address subjected to fetch request is specified, and simultaneously, success or failure of the bypass fetch is decided, and its result is reported to the request origin 4. In the case the bypass fetch executed unconditionally is unsuccessful, the fetch access is executed again, and the data is fetched from the move-in register 2 decided to be one which is requesting move-in to the same area as the fetch access to the main storage device 1.


Inventors:
TOYONISHI KOJI
TANAKA MASATO
Application Number:
JP15680192A
Publication Date:
January 14, 1994
Filing Date:
June 16, 1992
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G06F12/08; (IPC1-7): G06F12/08
Attorney, Agent or Firm:
Kyotani Shiro



 
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