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Title:
SEMICONDUCTOR INTEGRATED CIRCUIT
Document Type and Number:
Japanese Patent JPH066202
Kind Code:
A
Abstract:

PURPOSE: To provide an output buffer which has a short transition time of the output signal and is hard to generate noises.

CONSTITUTION: A pull-up control circuit 1 controls a pull-up transistor TR 31 of a buffer circuit 3, and the source of an N-channel TR 11 included in the circuit 1 is connected to a reference voltage terminal 101 which receives the reference voltage VREF generated by a reference voltage generating circuit 4. The voltage VREF has a constant level that is lower than the power voltage Vcc and not depenent on this voltage Vcc.


Inventors:
HIGASHIDE YOSHIKO
SHIOMI TORU
TSUDA NOBUHIRO
OKAMOTO YASUYUKI
Application Number:
JP10675792A
Publication Date:
January 14, 1994
Filing Date:
April 24, 1992
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G11C11/409; G11C11/407; H03K19/017; H03K19/0175; (IPC1-7): H03K19/0175; G11C11/409; H03K19/017
Attorney, Agent or Firm:
Fukami Hisaro (3 outside)



 
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