PURPOSE: To decrease the number of read gates corresponding to columns when (m) rows by (n) columns of bit matrix data are rotated clockwise and anticlock wise by 90°.

CONSTITUTION: The (m) rows by (n) columns of bit matrix data are stored in (m) registers 25-0-25-m-1 corresponding to the rows. Then, (n) read gates 26-0-26-n-1 corresponding to the columns of those stored data are used in common for both the clockwise rotation and anticlockwise rotation. Consequently, read addresses (for selective activation of read gates) are switched by a logic inverting selector 23 in both the right and left directions and used, and the weights of output bits of the read gates are switched by a bit weight inverter 22 and used.