PURPOSE: To detect a specific error buffer register in a retrying process for an error in write-and-run process for a memory using a buffer and report the error to a CPU by the bus adapter device which connects a high-speed bus including the memory and a low-speed bus including an input/output controller.

CONSTITUTION: Memory write information from input/output controllers 10 and 11 is stored in one of buffer registers 1050-1052. This register is selected through a counter 109 and a decoder 108. At this time, if an error in memory writing occurs, the counter 112 is updated in response to an error report (j) and the writing is retried. When the frequency of the retrial exceeds a prescribed value, specific information (e) specifying the current selected register is set in a register 106 with an over signal (k) and reported to a CPU 20. This selected buffer register is disconnected by an inhibit gate 111 on the basis of the specific information (h) and degenerative operation is carried on.