不揮発性半導体メモリドライブ

Title:

不揮発性半導体メモリドライブ

Document Type and Number:

Japanese Patent JP5296172

Kind Code:

B2

Abstract:

A control unit of a nonvolatile semiconductor memory drive has a first erase mode in which an address management table, which is indicative of a correspondency between logical block addresses and physical addresses of a nonvolatile semiconductor memory, is initialized to set the memory area of the nonvolatile semiconductor memory in a state in which no user data is written, a second erase mode in which the address management table is initialized to set the memory area in a state in which no user data is written, and the blocks, other than a defective block, which are included in the memory area, are erased, and a third erase mode in which the address management table is initialized to set the memory area in a state in which no user data is written, and the blocks, including the defective block, which are included in the memory area, are erased.

Inventors:

Takehiko Kurashige

Application Number:

JP2011200727A

Publication Date:

September 25, 2013

Filing Date:

September 14, 2011

Export Citation:

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Assignee:

Toshiba Corporation

International Classes:

G06F21/60; G06F21/79

Domestic Patent References:

JP2005135544A
JP2006031696A
JP2002109723A
JP2002008320A
JP2004240660A
JP2006039966A

Foreign References:

WO2008016081A1
WO2006067853A1

Attorney, Agent or Firm:

Kurata Masatoshi
Takakura Shigeo
Satoshi Kono
Makoto Nakamura
Yoshihiro Fukuhara
Takashi Mine
Toshio Shirane
Sadao Muramatsu
Nobuhisa Nogawa
Kocho Chojiro
Naoki Kono
Katsu Sunagawa
Morisezo Iseki
Tatsushi Sato
Takashi Okada
Mihoko Horiuchi
Takenori Masanori

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