PURPOSE: To improve rewriting characteristics by suppressing the generation of an avalanche charge when an erasing operation is conducted.

CONSTITUTION: The first N-type impurity layer 8a, on which a source region 8 is formed from the surface of a semiconductor substrate 1 to the prescribed depth, and the second N-type impurity layer 8b, in the density lower than the above-mentioned impurity layer 8b which is formed surrounding the lower side of the impurity layer 8a, are provided in the title semiconductor memory storage. The above-mentioned second N-type impurity layer 8b has a part protruding to a channel region side from the surface of the semiconductor substrate 1 to the prescribed depth in the region overlapping with a control electrode 3. As a result, the transverse electric field on the surface of the semiconductor substrate 1 is alleviated by the expansion of potential from the relatively deep part of the semiconductor substrate 1, and the generation of avalanche charge can be suppressed.