Title:
不揮発性半導体記憶装置
Document Type and Number:
Japanese Patent JP4175991
Kind Code:
B2
Abstract:
A non-volatile semiconductor memory device includes: a cell array having electrically rewritable and non-volatile memory cells arranged therein, the cell array being divided into a plurality of blocks, each the block being divided into a plurality of sub-blocks each having one or plural and continuous pages; and a controller for controlling data erasure of the cell array in a way that each the sub-block serves as a unit of data erasure, wherein each the sub-block in the cell array stores the number of data erasure which is renewed by each data erasure, and the number of data erasure is limited for each the sub-block to a permissible maximum value stored in a certain block in the cell array.
Inventors:
Fukuda Yasuyuki
Masatsugu Kojima
Kenichi Imamiya
Koji Hosono
Masatsugu Kojima
Kenichi Imamiya
Koji Hosono
Application Number:
JP2003355139A
Publication Date:
November 05, 2008
Filing Date:
October 15, 2003
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G11C16/00; G11C16/02; G11C16/04; G11C16/06; G11C16/10; G11C16/14; G11C16/16
Domestic Patent References:
| JP2003141880A | ||||
| JP2000222895A | ||||
| JP7220486A | ||||
| JP2118997A | ||||
| JP2239497A | ||||
| JP3295097A | ||||
| JP8143398A | ||||
| JP11176177A | ||||
| JP60074578A |
Attorney, Agent or Firm:
Masaru Itami
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