Title:
NONVOLATILE COUNTER CIRCUIT, MEMORY CONTROL METHOD AND PROGRAM
Document Type and Number:
Japanese Patent JP2017028409
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To suppress degradation of ferroelectric memory.SOLUTION: Every time receiving an input instruction signal to update counter value, a counter section 2 generates a n-bit first code (inverse gray code code) representing the counter value, in which at least values of (n-1)(n>2) bits change. A ferroelectric memory (FeRAM) 3 stores a first code. With this, the ferroelectric memory 3 is prevented from being imprinted in a polarization direction and degradation thereof is prevented.SELECTED DRAWING: Figure 1
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Inventors:
KAWASHIMA SHOICHIRO
KOKAYU MITSUHIRO
HIRAYAMA TOMOHISA
SUZUKI KENTARO
KOKAYU MITSUHIRO
HIRAYAMA TOMOHISA
SUZUKI KENTARO
Application Number:
JP2015143370A
Publication Date:
February 02, 2017
Filing Date:
July 17, 2015
Export Citation:
Assignee:
FUJITSU SEMICONDUCTOR LTD
International Classes:
H03K21/00; G11C11/22
Domestic Patent References:
| JP2010117316A | 2010-05-27 | |||
| JP2000207841A | 2000-07-28 |
Foreign References:
| US20050111287A1 | 2005-05-26 |
Attorney, Agent or Firm:
Takeshi Hattori