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Title:
NONVOLATILE SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59186361
Kind Code:
A
Abstract:

PURPOSE: To enable to use a volatile memory as a nonvolatile one by a method wherein two terminals, one is an ordinary power source terminal and the other is a power source terminal having a switch which is turned ON or OFF by the potential of the main power source, are provided on the volatile memory.

CONSTITUTION: The main power source 3, the volatile memory 1 and a power source unit 2 are connected respectively. Said memory 1 has two power source terminals, one is an ordinary power source terminal 6 and the other is a power source terminals 7 having a switch SW1 which is turned ON or OFF by potential of the main power source 3. Said switch SW1 is MOSFET, and a substrate is grounded by connecting a drain and a gate. Also, said power source unit 2 consists of a battery 9 which functions as a power source, and an MOSFET consists of a switch SW2 which is turned ON or OFF by the potential of the main power source 3. Its gate is connected to the terminal 7 for which the main power source 3 will be directly supplied, a drain is connected to the power source terminal 6 of the volatile memory, and a GND is connected to a GND terminal.


Inventors:
SHIYOUREN SHIROJI
WATARI SHIGERU
SUGANO MASAHIDE
YAMAGUCHI SEIJI
KOTANI HISAKAZU
TANIGUCHI TAKASHI
Application Number:
JP6014483A
Publication Date:
October 23, 1984
Filing Date:
April 06, 1983
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
G11C11/413; H01L27/06; H01L27/10; (IPC1-7): G11C11/34
Domestic Patent References:
JP57186143B
JP55178900B
JP56164322B
JPS5757324A1982-04-06
JPS5642365A1981-04-20
Attorney, Agent or Firm:
Akira Kobiji (2 outside)



 
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