Title:
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE
Document Type and Number:
Japanese Patent JPS61287273
Kind Code:
A
Abstract:
PURPOSE: To shorten a designing time by forming an Si signature transistor Tr in the same 2-layer gate structure as a nonvolatile memory Tr, thereby eliminating the complexity of the design.
CONSTITUTION: An Si signature TrT which forms a nonvolatile semiconductor memory has a 2-layer gate structure made of entirely the same pattern as a nonvolatile memory Tr. That is, a 2-layer structure of a floating gate 6 and a TrT control gate 2 is formed. When the Si signature Tr is formed of the 2-layer gate structure in this manner, a nonvolatile memory Tr and TrT can be formed by the repetition of the same patterns to reduce the complexity of design of the nonvolatile semiconductor memory, thereby shortening the designing time.
Inventors:
SEKIYA KIYOUZOU
Application Number:
JP12928585A
Publication Date:
December 17, 1986
Filing Date:
June 14, 1985
Export Citation:
Assignee:
NEC CORP
International Classes:
H01L27/112; H01L21/8246; H01L21/8247; H01L27/10; H01L27/115; H01L29/788; H01L29/792; (IPC1-7): H01L27/10; H01L29/78
Attorney, Agent or Firm:
Uchihara Shin
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