PURPOSE: To uniformize the write/erase for every block of respective memory cell arrays and to obtain high reliability by shifting the block of the memory cell array when prescribed number of times of erasure are performed and replacing physical address space.

CONSTITUTION: In the erase operation, an X decoder 4 and Y decoder 5 are made inactive, and all memory cells are made non-selective. That is, the control gates of respective memory cells are grounded, and the drains are opened. Then, the sources of respective memory cells are applied with a high voltage, e.g. a power voltage by a line switch 3, thereby all memory cells are erased collectively. A counter circuit 20 counts an erase signal outputting from a control circuit 14, and sends a signal to a block shift circuit 21 at the time of reading at prescribed number of times. The block shift circuit 21 shifts successively an address for every block of the memory cell array 1 based on the signal.