Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
NONVOLATILE SEMICONDUCTOR STORAGE DEVICE AND STORAGE METHOD
Document Type and Number:
Japanese Patent JP2012174294
Kind Code:
A
Abstract:

To avoid excessive erasing/writing of a memory unit and shorten a writing time.

A memory control circuit performs a reading operation for reading a data value stored in a memory unit (MU11), and starts a reverse writing operation for controlling charge amounts of first and second floating gates of the memory unit (MU11) so that a reverse value (XRD1) of the data value read by the reading operation is written into the memory unit (MU11), finishes the reverse writing operation before writing of the reverse value (XRD1) into the memory unit (MU11) is completed, and then performs a normal writing operation for controlling the charge amounts of the first and second floating gates of the memory unit (MU11) so that a writing data value (WD1) to be written into the memory unit (MU11) is written into the memory unit (MU11).


Inventors:
IWANARI SHUNICHI
Application Number:
JP2011032612A
Publication Date:
September 10, 2012
Filing Date:
February 17, 2011
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
PANASONIC CORP
International Classes:
G11C16/02; G11C16/04
Attorney, Agent or Firm:
Hiroshi Maeda
Hiroshi Takeuchi
Takahisa Shimada
Yuji Takeuchi
Katsumi Imae
Kazunari Ninomiya
Tomoo Harada
Seki Kei
Yasuya Sugiura
Daisuke Kawabe
Masanori Hasegawa
Tsuguya Iwashita
Koji Fukumoto
Ryo Maeda
Mawaki Hachizo
Yukichi Matsunaga
Kenji Kawakita
Shohei Okazawa



 
Previous Patent: DEVICE OPERATING UNIT

Next Patent: OPTICAL DISK DEVICE