PURPOSE: To reduce a circuit scale and to improve operation speed by providing an index addition/subtraction circuit inputting an overflow signal from an addition/subtraction circuit and adding/subtracting a shift signal from a selected index signal.
CONSTITUTION: The index signals 109 and 110 are compared in a two-input subtraction circuit 15. A mantissa signal is shifted in a shift circuit 10 from the result, and addition/subtraction are executed in the mantissa addition/ subtraction circuit 12. When overflow does not occur as a result, the overflow signal 116 becomes logic '0', and a shift signal 120 is outputted as a shift signal 107 as it is in a shift signal inhibition circuit 22. When overflow occurs, the overflow signal 116 becomes logic '1', and the value of the shift signal 107 becomes zero by the inhibition operation of the shift signal inhibition circuit. When the overflow signal 116 is logic '0', mantissa addition/subtraction circuit 19 subtracts the shift signal 107 from a selection index signal 115. When it is logic '1', the selection index signal 115 is addition-operated, and the result is outputted as an index part output signal 118.
TATEISHI SHUNSUKE
SAKAYORI YASUO