PURPOSE: To reject easily and surely frequency components of an input signal, by operating the difference between the output of a digital filter and the input signal by a subtracting circuit.

CONSTITUTION: An input signal is applied to the input of a digital filter 15. The digital filter 15 has the selective characteristics of a center frequency f0. Since the phase is not shifted in this filter 15, the difference between the output of this filter 15 and the input signal is operated by a subtracting circuit 26 to reject easily and surely components of the frequency f0. Meanwhile, the voltage of a commercial frequency f0 obtained in the secondary side of a trnasistor T is applied to a clock generating circuit as it is. The circuit 23 consists of a phase synchronizing circuit having the frequency multiplying function, and the clock signal of a frequency nf0 which has the phase synchronized with the power source frequency f0 is obtained as the output of the circuit 23. By this constitution, the center frequency of the filter 15 has the phase synchronized with the power source frequency f0 correctly; and when the power source frequency f0 is fluctuated, the center frequency is fluctuated while following this fluctuation completely.