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Title:
NRZ DATA DEMODULATOR
Document Type and Number:
Japanese Patent JPH0482418
Kind Code:
A
Abstract:

PURPOSE: To accurately perform the waveform shaping of an input signal by holding the charge voltage of an integration circuit corresponding to the detection output of a synchronous signal period to take synchronism with NRZ data.

CONSTITUTION: When level-compared output is decoded by a decoder 5 at a comparator 3, and the continuation of 0 and 1 for nine bits is detected, and it is discriminated that a period is the synchronous signal period, switches 6 and 7 are opened. The operation of a V/I conversion circuit 1 is stopped corresponding to the opening of the switch 6. Also, impedance observing the output side of the V/I conversion circuit 1 from a capacitor 2 goes to high corresponding to the opening of the switch 7, and discharge is stopped. Therefore, a charge voltage is held with the capacitor 2 as it is, and accurate discrimination output can be obtained by holding the voltage during the period of data transmission. Therefore, it is possible to accurately perform the waveform shaping of the input signal.


Inventors:
ISHIGURO KAZUHISA
SEKIGUCHI YUTAKA
Application Number:
JP19752490A
Publication Date:
March 16, 1992
Filing Date:
July 25, 1990
Export Citation:
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Assignee:
SANYO ELECTRIC CO
International Classes:
H03M5/06; H04L25/49; (IPC1-7): H03M5/06
Attorney, Agent or Firm:
Koji Yasutomi (1 person outside)



 
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