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Title:
OFDM RECEPTION APPARATUS, AND TS GENERATION CIRCUIT AND METHOD
Document Type and Number:
Japanese Patent JP2007288692
Kind Code:
A
Abstract:

To make an OFDM (Orthogonal Frequency Division Multiplexing) signal demodulation data speed coincident with a TS output data speed.

A frequency error calculation circuit 15 detects a clock frequency error from the number of data within a term determined from the term of a reception OFDM signals and transmission control information, a frequency division ratio control circuit 12 controls a frequency division ratio of a clock frequency dividing circuit 13 based on the detected clock frequency error, and a fixed frequency clock CLK-A is frequency-divided by the clock frequency dividing circuit 13, so that a smoothing output clock is generated in which the OFDM signal demodulation data speed is coincident with a smoothing output speed, and the generated smoothing output clock is used as a TS output clock. Thus, a transport stream (TS) smoothing an OFDM demodulation output signal is output from a buffer memory 11.

COPYRIGHT: (C)2008,JPO&INPIT


Inventors:
MIYAMOTO MASAKUNI
MATSUMOTO HIDEYUKI
HORI SATORU
MOMOSHIRO TOSHIHISA
KAWAUCHI TOSHIKI
LACHLAN BRUCE MICHAEL
Application Number:
JP2006116041A
Publication Date:
November 01, 2007
Filing Date:
April 19, 2006
Export Citation:
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Assignee:
SONY CORP
International Classes:
H04J11/00
Domestic Patent References:
JP2004214959A2004-07-29
JP2005064741A2005-03-10
Attorney, Agent or Firm:
Akira Koike
Eiichi Tamura
Seiji Iga