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Title:
OFFSET CORRECTION CIRCUIT AND SEMICONDUCTOR DEVICE AND RADIO EQUIPMENT PROVIDED WITH THE OFFSET CORRECTION CIRCUIT
Document Type and Number:
Japanese Patent JP2002151980
Kind Code:
A
Abstract:

To provide an offset correction circuit that realizes with one extra capacitor on an IC even when a bipolar signal is adopted for an input signal.

A low-pass filter circuit consisting of a resistor 12 and an externally mounted capacitor 13 extracts a DC component of one of bipolar signals given to input terminals 40, 41. A midpoint level of the bipolar signals is extracted from a connecting point between resistors 10 and 11 and used for a reference voltage. A differential amplifier circuit consisting of transistors(TRs) 22, 23, 24, 25 and a current source 33 generates a current Δi-dc proportional to a difference between the DC component and the reference voltage. Using a pre-stage current mirror circuit consisting of TRs 26, 27, 28 and a current source 34 whose current is I0 and a post-stage current mirror circuit consisting of TRs 29, 30 and a current source 35 whose current is 2×I0 can provide outputs of currents I0+Δi-dc and I0-Δi-dc.


Inventors:
SUZUKA MASAKI
Application Number:
JP2000342465A
Publication Date:
May 24, 2002
Filing Date:
November 09, 2000
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03F3/45; H03F1/34; H03F3/34; (IPC1-7): H03F3/34; H03F1/34; H03F3/45
Attorney, Agent or Firm:
Role Masaaki (3 others)



 
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