Title:
OPERATING SYSTEM ARCHITECTURE USING SYNCHRONOUS TASK
Document Type and Number:
Japanese Patent JP2004288162
Kind Code:
A
Abstract:
To easily confirm and correct the error caused by timing, while independently executing a plurality of threads of a multi-threaded process (preempting to each other).
This is a method of executing the thread. This method includes a step for indicating that the thread can be preemptied, or the thread cannot be preemptied.
Inventors:
SHAYLOR NICHOLAS
Application Number:
JP2003419367A
Publication Date:
October 14, 2004
Filing Date:
December 17, 2003
Export Citation:
Assignee:
SUN MICROSYSTEMS INC
International Classes:
G06F9/46; G06F9/48; (IPC1-7): G06F9/46
Attorney, Agent or Firm:
Hironobu Onda
Makoto Onda
Makoto Onda