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Title:
OPERATIONAL AMPLIFIER CIRCUIT, CAPACITANCE DETECTOR AND FINGERPRINT COLLATION EQUIPMENT
Document Type and Number:
Japanese Patent JP2003078365
Kind Code:
A
Abstract:

To solve the problem that an offset of several mV to several tens of mV due to working precision, manufacturing irregularity, etc., is generated in an operational amplifier, when an operational amplifier circuit of a switched capacitor amplifier or the like is realized by using a CMOS semiconductor process.

In the switched capacitor amplifier having an operational amplifier 121 in which a feedback capacitor 122 is connected to a part between an output terminal and an opposite phase input terminal, an offset canceling circuit 13 is installed, thereby canceling the offset of the operational amplifier 121. The circuit 13 comprises a switch 131 connected to a part between a positive side terminal of a reference voltage source 16 for supplying a reference voltage Vref and a positive phase (+) input terminal of the amplifier 121, switches 132, 133 which are connected in series to a part between the positive side terminal of the voltage source 16 and an opposite phase input terminal of the amplifier 121, and a canceling capacitor 134 connected to a part between the respective output terminals of the switches 131, 132.


Inventors:
YOSHIOKA MASAKI
YANO MOTOYASU
SHINOZAKI KEIICHI
Application Number:
JP2001268288A
Publication Date:
March 14, 2003
Filing Date:
September 05, 2001
Export Citation:
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Assignee:
SONY CORP
International Classes:
A61B5/117; G06K9/00; G06T1/00; H03F1/34; H03F3/34; H03H19/00; G01R27/26; (IPC1-7): H03F3/34; A61B5/117; G01R27/26; G06T1/00; H03F1/34; H03H19/00
Attorney, Agent or Firm:
Kuninori Funabashi