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Title:
OPTICAL COUPLING LOGICAL DEVICE
Document Type and Number:
Japanese Patent JPH04123521
Kind Code:
A
Abstract:

PURPOSE: To easily apply this device to a system even when its power supply system is different by connecting relevant emitters of each phototransistor(TR) respectively and connecting a current limiting resistor in series between each photocoupler element and a common level so as to constitute a 2-input NAND circuit.

CONSTITUTION: Light emitting elements D1, D2 are provided opposite to the light receiving faces of light receiving elements 3, 4 of a phototransistor(TR) of multi-emitter structure having at least two emitters. Emitters 7, 8 of the light receiving element 3 are connected respectively to the emitters 9, 10 of the light receiving element 10 and the emitters are connected respectively to common level connection terminals 18, 19 via current limiting resistors R1, R2. Moreover, the emitters 7, 9 are connected to the terminal 17 and the emitters 8, 10 are connected to the terminal 16, and the collectors of the light receiving elements 3, 4 are connected to a common power supply terminal 15. Thus, when one of the light receiving elements 3, 4 stops its operation, so long as the other light receiving element is in operation, the output is maintained. Thus, the logical system is constituted freely between circuit systems with different power supply systems.


Inventors:
KUMADA KIYOSHI
Application Number:
JP24588190A
Publication Date:
April 23, 1992
Filing Date:
September 13, 1990
Export Citation:
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Assignee:
SHARP KK
International Classes:
H01L31/12; H03K19/14; (IPC1-7): H01L31/12; H03K19/14
Attorney, Agent or Firm:
Fukushi Aihiko



 
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