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Title:
OPTICAL RECEIVING CIRCUIT
Document Type and Number:
Japanese Patent JP2013089999
Kind Code:
A
Abstract:

To provide an optical receiving circuit which is extremely short in delay time from a time when an optical signal has been incident on a photodiode to a time until a received signal is output from a comparing section, and can suppress generation of pulse width distortion.

In an optical receiving circuit, an amplifying section AMP converts a current signal which has been output from a photodiode PD into a voltage signal, and amplifies the converted voltage signal. A signal processing section SP receives the voltage signal which has been output from the amplifying section AMP, attenuates the voltage signal, provides an offset to the voltage signal, and delays and outputs the voltage signal. A comparing section COMP has a first input terminal COMP1 receiving the voltage signal which has been output from the amplifying section AMP and a second input terminal COMP2 receiving the voltage signal which has been output from the signal processing section SP, compares the voltage signals which have been input to the first and second input terminals COMP1 and COMP2 to each other, and outputs a received signal.


Inventors:
INAGAKI YUTO
Application Number:
JP2011225872A
Publication Date:
May 13, 2013
Filing Date:
October 13, 2011
Export Citation:
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Assignee:
HAMAMATSU PHOTONICS KK
International Classes:
H04B10/40; H04B10/50; H04B10/60
Domestic Patent References:
JPH0983315A1997-03-28
JP2005072925A2005-03-17
JPH03110920A1991-05-10
JPS58215837A1983-12-15
JP2009044228A2009-02-26
JP2004312486A2004-11-04
JPH09219679A1997-08-19
JPH0936815A1997-02-07
JPS6369336A1988-03-29
JPH04358443A1992-12-11
JP2008236392A2008-10-02
JP2004260230A2004-09-16
JPH06224711A1994-08-12
JPS6373743A1988-04-04
Attorney, Agent or Firm:
Yoshiki Hasegawa
Yoshiki Kuroki
Satoru Ishida