Title:
OPTICAL SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JP3488137
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To enlarge a contact area with a p-clad layer and prevent reduction of contact resistance by burying a core layer side surface by a p-type semiconductor layer, and making the carrier concentration at the side in contact with an n-type semiconductor substrate or an n-type semiconductor clad layer thereof higher than the carrier concentration in an opposite side.
SOLUTION: A ZnO film 103 is deposited on an n-InP substrate 101 and an optical waveguide structure consisting of an n-InP layer 106, a stained InGaAsP/InGaAs multiple quantum well active layer 107, and a p-InP layer is selectively formed in an opening part. In the process, because of high temperature of a substrate, zinc is subjected to solid phase diffusion from a ZnO film to the n-InP substrate 101 and a p-type inversion region 105 is formed. Then, a current block layer consisting of a p-InP layer 110 and an n-InP layer 111 is subjected to burying selective growth only for a mesa top of a p-InP layer 108. Lastly, a p-InP clad layer 112 and a p-InGaAs cap layer 113 are made to grow and an SiO2 interlayer film, a p-electrode and an n-electrode are formed.
Inventors:
Yasutaka Sakata
Application Number:
JP16539299A
Publication Date:
January 19, 2004
Filing Date:
June 11, 1999
Export Citation:
Assignee:
NEC Electronics Corporation
International Classes:
H01L21/205; H01S5/026; H01S5/227; H01S5/343; (IPC1-7): H01S5/026; H01L21/205; H01S5/227; H01S5/343
Domestic Patent References:
| JP11121869A | ||||
| JP6177364A | ||||
| JP8330676A | ||||
| JP4303982A | ||||
| JP6314657A |
Attorney, Agent or Firm:
Masahiko Desk (2 outside)