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Patent Searching and Data


Title:
OSCILLATING CIRCUIT
Document Type and Number:
Japanese Patent JPS56111315
Kind Code:
A
Abstract:

PURPOSE: To suppress a latch-up phenomenon by inputting the output voltage of a capacitor to a circuit with a different threshold level, by setting and resetting a flip- flop with its output and by charging and discharging the capacitor according to the output of the flip-flop.

CONSTITUTION: When output Q of flip-flop FF19 is at a low level, switch element 12 is on and element 13 is off, so that capacitor 18 is charged by constant current source 11. As the charging voltage exceeds the threshold level of inverter 22, FF19 is set and output Q is at a high level. Consequently, the states of switch elements 12 and 13 are inverted and the capacitor is discharged via switch element 13. As the discharging voltage drops below the threshold level of inverter 23, FF19 is reset to its initial state and this operation is repeated.


Inventors:
KANEKO TAKAO
KIKUCHI HIROYUKI
UCHIMURA KUNIHARU
IWATA MINORU
Application Number:
JP1380980A
Publication Date:
September 03, 1981
Filing Date:
February 06, 1980
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H03K3/02; H03K4/06; (IPC1-7): H03K3/03



 
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