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Title:
OSCILLATION CIRCUIT AND OPERATION METHOD THEREOF
Document Type and Number:
Japanese Patent JP2005198199
Kind Code:
A
Abstract:

To provide a technique to reduce the dispersion of oscillation frequencies of an oscillation circuit.

The oscillation circuit 1 comprises a first MOS transistor MN1 having a gate connected to a first node N1 and a source connected to a grounding terminal 13; a second MOS transistor MN2 with a gate connected to a second node N2 and a source connected to a grounding terminal 14; a current supply circuit 2 for supplying a control current I1; a threshold correction circuit 4 for supplying a correction current I2; and a current charging/discharging circuit 5 for supplying a charging current, which is generated by superposing the control current I1 on the correction current I2 alternately to the first node N1 and the second node N2, in response to the drain potentials of the first MOS transistor MN1 and the second MOS transistor MN2. The threshold correcting circuit 4 increases the correction current I2 with an increase in the threshold voltage of a third MOS transistor MN5, which is the threshold voltages of the transistors MN1 and MN2.


Inventors:
YOSHIDA ATSUSHI
Application Number:
JP2004004624A
Publication Date:
July 21, 2005
Filing Date:
January 09, 2004
Export Citation:
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Assignee:
NEC ELECTRONICS CORP
International Classes:
H03B1/00; H03K3/011; H03K3/354; H03K3/03; (IPC1-7): H03K3/03; H03K3/354
Attorney, Agent or Firm:
Minoru Kudo