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Title:
OSCILLATION CIRCUIT
Document Type and Number:
Japanese Patent JPS61131911
Kind Code:
A
Abstract:

PURPOSE: To reduce power consumption by using of a differential amplifier consisting of MOS transistors (TR) whose threshold value differ from each other.

CONSTITUTION: Depletion MOSFETs 1D, 2D are turned off and enhancement MOSFETs 3, 4 are turned on at a point of time t*1 when a capacitor 5 is charged. When the charging to the capacitor 5 is progressed and a gate voltage V*1 takes a maximum value, the relation of V*2-V*1=VthE-VthD is established, where V*1, V*2 are common gate voltage and VthD, VthE are threshold voltages in the relation of drain currents to a gate-source voltage VGS, then the FETs 1D, 2D are turned on and the FETs 3, 4 are turned off to start discharging. When the V*1 reaches a minimum value at a point of time t*3, the FETs 1D, 2D are turned off and the FETs 3, 4 are turned on to start charging to the capacitor 5. The circuit enters the oscillating state through the repetition.


Inventors:
SONEDA MITSUO
Application Number:
JP25381484A
Publication Date:
June 19, 1986
Filing Date:
November 30, 1984
Export Citation:
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Assignee:
SONY CORP
International Classes:
H03K3/0231; H03K3/023; (IPC1-7): H03K3/023
Attorney, Agent or Firm:
Sada Ito



 
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