Title:
発振回路
Document Type and Number:
Japanese Patent JP4833755
Kind Code:
B2
Abstract:
An oscillator circuit having a relatively simple circuit structure while enabling full swing with low power consumption includes an oscillation core block, a voltage restriction block, and a differential output block. Drain terminals of first and second transistors are each connected to the voltage restriction block. The voltage restriction block restricts the amplitude of an oscillation signal to a reference voltage. Source terminals of third and fourth transistors are connected to drain terminals of fifth and sixth transistors, and source terminals of seventh and eighth transistors are connected to drain terminals of ninth and tenth transistors. This supplies the differential output block with current generated by the amplitude restriction. The differential output block converts the current into drive voltage to ground voltage to perform full swing.
Inventors:
Hiroyuki Kimura
Application Number:
JP2006189731A
Publication Date:
December 07, 2011
Filing Date:
July 10, 2006
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
H03K4/50; H03K3/353
Domestic Patent References:
| JP53138262A | ||||
| JP10146971A |
Attorney, Agent or Firm:
Mamoru Kuwagaki