PURPOSE: To keep the high speed performance of switching operation when both outputs from OR/NOR or the like are outputted simultaneously by controlling the drive of 1st transistor(TR) connected in series with a 2nd TR based on a positive signal, and controlling the drive of the 2nd TR based on a transient large current signal and a transient interrupt signal.

CONSTITUTION: Positive/negative signal generating means O2, O3 generate a positive signal Te and a negative signal Tn based on a single input signal, transient signal generating means C21, R24 generate a transient large current signal Tt and a transient interrupt signal Tb based on the negative signal Tn, a 1st TR Q21 being the component of an output stage is controlled for its driving by a positive signal and the drive of a 2nd TR Q22 is controlled based on the transient large current signal Tt and a transient interrupt signal Tb. Thus, both positive and negative signals are easily generated independently of the circuit constitution of the input signal generator and when both outputs of OR/NOR, AND/NAND or the like are simultaneously outputted especially, the effect of the transient signal generating means C21, R24 on the other level change between both the signals is evaded. Thus, high speed switching operation is kept.