Title:
OUTPUT PORT SYSTEM
Document Type and Number:
Japanese Patent JPS5831408
Kind Code:
A
Abstract:
PURPOSE:To supply data signals in every bit to plural output port by supplying a data latching signal to only one latch circuit selected by an address signal in accordance with the generation of a strobe signal. CONSTITUTION:An address signal AS from an output port circuit 1 is supplied to an address decoder 2 and a strobe signal generating circuit 5 and a data signal DS from the circuit 1 is supplied to the strobe signal generating circuit 5 and each latch circuit in parallel. A data latching signal DLS is supplied from the address decoder 2 to a latch circuit 3 selected by the address signal AS in accordance with the generation of a strobe signal SS to allow the latch circuit 3 to latch the data signal DS. Consequently the data signal DS from the output port circuit 1 is transferred to an output port 4.
Inventors:
NAGASHIMA SUNAO
Application Number:
JP12868481A
Publication Date:
February 24, 1983
Filing Date:
August 19, 1981
Export Citation:
Assignee:
CANON KK
International Classes:
G06F13/12; G05B15/02; G06F13/42; (IPC1-7): G05B15/00; G06F3/00
Attorney, Agent or Firm:
Yoshikazu Tani